We develop advanced packaging solutions for high-performance computing (HPC) and AI applications, focusing on high-density interconnection, thermal management, and reliable 3D integration. Hybrid bonding technologies, including Cu–Cu and Cu/dielectric bonding, are developed for fine-pitch interconnection and HBM-oriented 3D stacking, while advanced solder reflow processes are optimized to achieve reliable microbump and flip-chip joints through controlled solder wetting and intermetallic compound formation.

For thermal management, we develop thermally conductive polymer composites with optimized filler alignment to form efficient heat-transfer pathways, together with high-performance thermal interface materials (TIMs) that reduce interfacial thermal resistance between chips, heat spreaders, and cooling structures. Robust underfills and ACF/NCF films are also investigated for fine-pitch flip-chip assemblies to improve adhesion, stress distribution, and thermomechanical reliability.

Electroplating processes for Cu, Sn, Ni, and related metallization structures are developed for redistribution layers, bonding pads, and microbumps. Plating thickness, uniformity, surface morphology, and microstructure are carefully controlled to provide high-quality metallization for subsequent reflow and bonding processes. Reliability is evaluated under thermal cycling, thermal shock, humidity, and high-power operating conditions to assess interconnect degradation, delamination, warpage, and long-term package stability, supporting high-bandwidth and energy-efficient AI accelerators and data-intensive computing systems.