For quantum computing, we develop packaging technologies for cryogenic environments (10–100 mK), focusing on low-loss superconducting interconnects, low-loss dielectric substrates, and scalable flip-chip/3D integration. Package structures are designed to minimize microwave crosstalk, parasitic modes, thermal leakage, and mechanical stress while maintaining stable signal and ground transmission. Cryogenic-compatible materials, including niobium, aluminum, sapphire, and high-resistivity silicon, are integrated with precision bonding and hermetic packaging approaches to support reliable large-scale quantum processors.

We also develop quantum-compatible solder interconnects for low-temperature and superconducting packaging. Solder bumps serve not only as mechanical joints but also as critical electrical and microwave signal paths, making solder composition, UBM structure, interfacial reactions, IMC formation, and microstructural uniformity important design parameters. Low-resistance and stable solder joints are developed through controlled bonding and metallization processes, while cryogenic electrical characterization and thermal cycling are used to evaluate interconnect integrity, resistance stability, and long-term reliability.